The driver doesn't support software time-stamping.Hence compatibility string of axidma node (DTS) is set to a dummy device-tree property compatible = "xlnx,eth-dma" The driver doesn't use dma engine framework and contains DMA programming sequence i.e doesn't use separate DMA driver.The driver assumes that Axi Ethernet IP is connected to the DMA at the hardware level.Missing Features and Known Issues/Limitations in Driver Supports AXI DMA and AXI MCDMA dma configuration.Supports Independent 4K, 8K, 16K, or 32KB TX and RX frame buffer memory.Support for GMII/RGMII/SGMII/1000Base-X Phy Configurations.10G Base-R support for Legacy 10G MAC(PG157) and 10G MAC (PG210). Speed support for 10/100/1000 Mbps for 1G MAC.IEEE 1588 Support for 1G and legacy 10G MAC (PG157), 10G Ethernet subsystem(PG210) and MRMAC.Support ethernet IPs- AXI 1G/2.5G Ethernet subsystem (PG138), 10G Ethernet subsystem(PG157), 10G Ethernet Subsystem(PG210), USXGMII(PG251) and MRMAC.User-side AXI4-Stream interface for data.Hardened IP (to be used with Soft DMA and logic for driver subsystems).The driver supports 25GE and 10GE with 1 to 4 lanes.Multi rate Ethernet MAC supporting speeds from 10G to 100G.Support for 802.3x and priority-based pause operation.32-bit AXI4-Stream interface for datapath.Code replication/removal of lower rates onto the 10GE link.Both media access control (MAC) and PCS/PMA functions are included.Designed to meet the USXGMII specification EDCS-1467841 revision 1.4.Optional IEEE 1588 1-step and 2-step timestamping.Optional clause 108 25G Reed-Solomon Forward Error Correction (RS-FEC) sublayer.Optional clause 74 BASE-KR FEC sublayer.BASE-R PCS sublayer operating at 10.3125Gb/s or 25.78125Gb/s.Status signals for all major functional indicators.Includes complete Ethernet MAC and PCS/PMA functions, standalone MAC or standalone PCS/PMA for 10 Gb/s operation.Includes complete Ethernet MAC and PCS/PMA functions or standalone PCS/PMA for 25Gb/s operation.Designed to the Ethernet requirements for 10/25 Gb/s operation specified by IEEE 802.3 Clause 49, IEEE 802.3by, and the 25G Ethernet Consortium.Supports high accuracy IEEE Standard 1588-2008 1-step and 2-step timestamping on a 10GBASE-R network interface.Independent TX and RX Maximum Transmission Unit (MTU) frame length.Supports 802.3 and 802.1Qbb flow control.Supports 10GBASE-KR backplane links including Auto-Negotiation (AN), Training and Forward Error Correction (FEC).Supports 10GBASE-SR, -LR and -ER optical links in Zynq-7000, UltraScaleā¢, Virtex-7, and Kintex-7 devices (LAN mode only).Configured and monitored through an optional AXI4-Lite Management Data interface or using status and configuration vectors.AXI4-Stream protocol support on client TX and RX interfaces.Designed to 10 Gigabit Ethernet specification IEEE Standard 802.3-2012.Ethernet Audio Video Bridging (AVB) support.Support for pause frames for flow control.Support for 1000BASE-X and SGMII over select Input/Output (I/O) low voltage differential signaling (LVDS).Support for MII, GMII, RGMII, SGMII, and 1000BASE-X PHY interfaces.HW IP features AXI 1G/2.5G Ethernet Subsystem (PG138) Paths, files, links and documentation on this page are given relative to the Linux kernel source tree.
0 Comments
Leave a Reply. |
AuthorWrite something about yourself. No need to be fancy, just an overview. ArchivesCategories |